Integrated circuit designed for artificial intelligence (AI) processing may be embedded with memory for storing model parameters for one or more AI models/networks. The AI models/networks, for example, may include a plurality of multilayer deep learning neural networks requiring a large amount of memory for storing their model parameters. Even though deployment of AI models/networks may have more relaxed memory bit error rate (BER) requirement compare to other applications, AI circuits with embedded memory having BER higher than such a relaxed requirement are typically discarded at a testing stage regardless of the specifics of the AI models/networks to be deployed in the AI circuits, leading to relatively lower chip yield.